feat(adapter-riscv): add RiscVPlatform, PLIC driver, and kernel boot on QEMU

This commit is contained in:
2026-10-18 01:56:18 +02:00
parent 941704bbbc
commit 2436061215
5 changed files with 149 additions and 1 deletions

View File

@@ -2,6 +2,8 @@
#![no_main]
mod page_table;
mod platform;
mod plic;
mod timer;
mod trap;
mod uart;
@@ -52,8 +54,28 @@ extern "C" fn kmain() -> ! {
trap::init_trap();
timer::init_timer();
plic::Plic::init();
uart.write_str("k-os: traps and timer initialized\n");
let riscv_platform = platform::RiscVPlatform::new();
let pool = domain::memory::page_pool::PagePool::new(
types::address::PhysicalAddress::from_raw(0x84000000),
256,
);
let mut kern = kernel::Kernel::new(riscv_platform, pool);
let (pid, tid) = kern
.boot(
types::bounded::Priority::new(16).unwrap_or_else(|| unreachable!()),
types::time::TimeSlice::new(100),
)
.unwrap_or_else(|_| loop { unsafe { core::arch::asm!("wfi") }; });
uart.write_str("k-os: kernel started (pid=");
uart.write_dec(pid.raw() as usize);
uart.write_str(", tid=");
uart.write_dec(tid.raw() as usize);
uart.write_str(")\n");
loop {
unsafe { core::arch::asm!("wfi") };
}