feat: SMP stage 1 (4 harts, per-hart guarded stacks, home-core affinity, IPIs, TLB shootdown, one temporary kernel lock), 4-core storm

crates/adapter-riscv/src/boot/loader.rs

@@ -13,7 +13,6 @@ const MAX_FILE_SIZE: usize = 64 * 1024;
 
 pub struct LoadedProcess {
     pub pid: ProcessId,
-    pub entry: usize,
 }
 
 fn kern() -> &'static mut kernel::Kernel<crate::platform::RiscVPlatform> {
@@ -48,7 +47,7 @@ pub fn load_init(uart: &Uart, blk: &mut VirtioBlk) -> (LoadedProcess, ThreadId)
     setup_thread(tid, entry);
     uart.write_str("k-os: init loaded\n");
 
-    (LoadedProcess { pid, entry }, tid)
+    (LoadedProcess { pid }, tid)
 }
 
 pub fn load_server(
@@ -69,35 +68,7 @@ pub fn load_server(
     uart.write_str(label);
     uart.write_str(" loaded\n");
 
-    LoadedProcess { pid, entry }
-}
-
-pub fn enter_userspace(pid: ProcessId, entry: usize, shared_buf_va: usize) -> ! {
-    let pt_addr = kern().platform_mut().page_table_for(pid);
-    if pt_addr != 0 {
-        mmu::activate(mmu::page_table::table_at(pt_addr));
-    }
-
-    let kernel_sp: usize;
-    unsafe { core::arch::asm!("mv {0}, sp", out(reg) kernel_sp) };
-    crate::trap::set_kernel_stack(kernel_sp);
-
-    unsafe {
-        core::arch::asm!(
-            "csrc sstatus, {spp}",
-            "csrs sstatus, {spie}",
-            "csrw sepc, {entry}",
-            "mv sp, {stack}",
-            "mv a0, {arg}",
-            "sret",
-            spp = in(reg) 1usize << 8,
-            spie = in(reg) 1usize << 5,
-            entry = in(reg) entry,
-            stack = in(reg) USER_VA_BASE,
-            arg = in(reg) shared_buf_va,
-            options(noreturn),
-        );
-    }
+    LoadedProcess { pid }
 }
 
 fn setup_thread(tid: ThreadId, entry: usize) {