feat: SMP stage 1 (4 harts, per-hart guarded stacks, home-core affinity, IPIs, TLB shootdown, one temporary kernel lock), 4-core storm
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@@ -10,6 +10,7 @@ use types::{
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use crate::board;
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use crate::hw::{plic::Plic, timer};
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use crate::mmu;
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use crate::smp;
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use crate::trap;
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pub struct RiscVPlatform {
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@@ -20,9 +21,9 @@ pub struct RiscVPlatform {
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}
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impl RiscVPlatform {
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pub fn new(kernel_pt_addr: usize) -> Self {
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pub fn new(kernel_pt_addr: usize, num_cores: u8) -> Self {
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Self {
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num_cores: 1,
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num_cores,
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kernel_pt: kernel_pt_addr,
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page_tables: [0usize; MAX_PROCESSES],
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}
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@@ -63,8 +64,10 @@ impl Platform for RiscVPlatform {
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let Some(root) = self.root(process) else {
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return;
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};
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// The caller may be tearing down the space we are running on; get
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// off it before the kernel frees its frames.
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// No hart may still translate through it once the kernel frees its
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// frames: other harts leave it (and wait for nothing but that), and
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// the caller may be tearing down the space we are running on.
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smp::shoot_down(root);
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if mmu::active_root() == root {
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// SAFETY: the kernel page table lives in the boot heap forever.
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mmu::activate(unsafe { &*(self.kernel_pt as *const mmu::PageTable) });
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@@ -95,6 +98,8 @@ impl Platform for RiscVPlatform {
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fn unmap_page(&mut self, process: ProcessId, va: VirtualAddress) {
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if let Some(root) = self.root(process) {
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mmu::unmap_user_page(root, va.raw());
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// Other harts running this process may still cache it.
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smp::shoot_down(root);
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}
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}
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@@ -144,10 +149,12 @@ impl Platform for RiscVPlatform {
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Plic::enable(irq.raw() as u32);
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}
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fn send_ipi(&mut self, _target: CoreId) {}
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fn send_ipi(&mut self, target: CoreId) {
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smp::kick(target.raw() as usize);
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}
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fn core_id(&self) -> CoreId {
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CoreId::from_raw(0)
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CoreId::from_raw(smp::hart_id() as u8)
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}
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fn num_cores(&self) -> u8 {
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