feat: proper IPC-based boot — init loads servers from storage via IPC, VirtIO GPU driver

Complete microkernel boot pipeline: adapter loads only init + storage + display
from disk. Init bootstraps all other servers by reading binaries from the
storage server via IPC, parsing ELF, creating processes, mapping pages, and
spawning threads.

New syscalls:
- CreateEndpoint: userspace endpoint creation with full capability grant
- DebugPutchar: debug output to UART from userspace
- MapPage: cross-process page mapping (init loads binaries into children)
- SpawnThreadIn: spawn thread in another process via capability

Key fixes:
- Per-process L1 page tables for VPN[2]=0 (prevents cross-process corruption)
- Separate kernel_pt from page_tables[0] (init pid=0 overwrote kernel PT ref)
- Thread Running state set in switch_to_next (syscalls rejected without it)
- Pending IPC results applied during context switch
- SIE disabled during boot (timer can't preempt into unready processes)
- User heap VA starts at 0x40000 (avoids shared buffer at 0x30000)
- RequestPages maps at user VAs via per-process heap allocator

VirtIO GPU:
- Adapter probes for GPU device, initializes resource/scanout/backing
- Display server writes to mapped framebuffer, flushes via GPU virtqueue
- 640x480 BGRA framebuffer with transfer-to-host and resource-flush

Storage server:
- Userspace VirtIO block driver using pre-mapped MMIO and DMA pages
- FAT16 filesystem reader serving file-read requests via IPC
- Shared buffer protocol: init writes filename, storage writes file data

Echo app for IPC testing (adapter-loaded echo proved the pipeline end-to-end).

crates/adapter-riscv/src/platform.rs

@@ -16,14 +16,17 @@ use crate::trap;
 
 pub struct RiscVPlatform {
     num_cores: u8,
+    kernel_pt: usize,
     page_tables: [usize; MAX_PROCESSES],
 }
 
 impl RiscVPlatform {
     pub fn new(kernel_pt_addr: usize) -> Self {
-        let mut pt = [0usize; MAX_PROCESSES];
-        pt[0] = kernel_pt_addr;
-        Self { num_cores: 1, page_tables: pt }
+        Self {
+            num_cores: 1,
+            kernel_pt: kernel_pt_addr,
+            page_tables: [0usize; MAX_PROCESSES],
+        }
     }
 
     pub fn page_table_for(&self, pid: ProcessId) -> usize {
@@ -37,7 +40,7 @@ impl RiscVPlatform {
     fn ensure_page_table(&mut self, pid: ProcessId) -> &mut mmu::PageTable {
         let idx = pid.raw() as usize;
         if self.page_tables[idx] == 0 {
-            let kernel_pt = unsafe { &*(self.page_tables[0] as *const mmu::PageTable) };
+            let kernel_pt = unsafe { &*(self.kernel_pt as *const mmu::PageTable) };
             let user_pt = mmu::create_user_page_table(
                 kernel_pt,
                 PhysicalAddress::from_raw(0),
@@ -131,6 +134,28 @@ impl Platform for RiscVPlatform {
         });
     }
 
+    fn debug_putchar(&self, byte: u8) {
+        crate::hw::uart::Uart::new().put_char(byte);
+    }
+
+    fn translate_va(&self, process: ProcessId, va: VirtualAddress) -> Option<PhysicalAddress> {
+        let pt_addr = self.page_tables[process.raw() as usize];
+        if pt_addr == 0 { return None; }
+        let pt = unsafe { &*(pt_addr as *const mmu::PageTable) };
+        mmu::translate(pt, va.raw()).map(PhysicalAddress::from_raw)
+    }
+
+    fn map_user_page(&mut self, process: ProcessId, va: VirtualAddress, pa: PhysicalAddress, writable: bool, executable: bool) {
+        let pt = self.ensure_page_table(process);
+        let flags = mmu::Sv39Flags::user(true, writable, executable);
+        mmu::map(pt, mmu::Mapping {
+            va,
+            pa,
+            pages: 1,
+            flags,
+        });
+    }
+
     fn halt(&self) -> ! {
         unsafe {
             core::arch::asm!(