4 Commits

Author SHA1 Message Date
3a0395453b refactor: extract shared hw-virtio crate, eliminate VirtIO protocol duplication
Two VirtIO block and two VirtIO GPU implementations (adapter + driver)
shared 90% of their protocol logic. Extracted the common code into
hw-virtio, parameterized by MmioAccess trait.

New crate: hw-virtio (no_std, zero deps)
  - mmio.rs: MmioAccess trait, DirectMmio, init_legacy_device(), scan
  - queue.rs: VirtioQueue with descriptor chain submit + poll
  - block.rs: block read protocol (3-descriptor chain)
  - gpu.rs: GPU commands (create_2d, attach_backing, set_scanout,
            transfer_to_host, resource_flush)

Adapter thin wrappers (identity-mapped, statics for DMA):
  - virtio_blk.rs: 220 → 53 lines
  - virtio_gpu.rs: 165 → 37 lines

Driver thin wrappers (mapped VAs, phys-info for DMA):
  - drivers/block/virtio: 139 → 70 lines
  - drivers/framebuffer/virtio: 146 → 95 lines

Also deleted input-server/input_device.rs (1-line re-export,
superseded by port-input-device).
2026-10-18 13:29:28 +02:00
a910c06cf7 refactor(adapter-riscv): replace hardcoded demo with proper init launch via ELF parsing
Adapter now: parses init binary (ELF or raw), allocates pages, creates
user page table, sets thread entry point in SavedContext, enters U-mode.
Init takes over from there — no more IPC demo hardcoded in the adapter.
2026-10-18 04:13:13 +02:00
e092fa4ae5 fix: disable test harness for no_std binaries, fix shutdown to best-effort notify-and-halt, use CapSlot newtypes 2026-10-18 04:01:39 +02:00
44a0ead7f2 feat(adapter-riscv): boot on QEMU virt with UART hello world 2026-10-18 01:46:47 +02:00