107 lines
4.3 KiB
Rust
107 lines
4.3 KiB
Rust
use crate::mmio::MmioAccess;
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use crate::queue::{Descriptor, VirtioQueue};
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use libkos::Window;
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use types::address::{ByteOffset, PhysicalAddress};
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use types::display::Dimension;
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/// The command page: commands go out from its start, responses come back
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/// at `RESPONSE`.
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pub struct GpuDmaAddrs {
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pub cmd_pa: PhysicalAddress,
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pub cmd: Window,
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pub resp_pa: PhysicalAddress,
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}
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pub const RESPONSE: ByteOffset = ByteOffset::new(512);
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/// Command fields (virtio spec 5.7.6.7): a 24-byte header, then the body.
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const TYPE: ByteOffset = ByteOffset::new(0);
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const BODY: ByteOffset = ByteOffset::new(24);
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/// Most bodies start with a rectangle: x, y, width, height.
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const RECT_X: ByteOffset = ByteOffset::new(24);
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const RECT_Y: ByteOffset = ByteOffset::new(28);
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const RECT_W: ByteOffset = ByteOffset::new(32);
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const RECT_H: ByteOffset = ByteOffset::new(36);
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/// The 24 bytes of header and 16 of rectangle in a display-info response.
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const DISPLAY_W: ByteOffset = ByteOffset::new(24 + 8);
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const DISPLAY_H: ByteOffset = ByteOffset::new(24 + 12);
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pub fn create_2d(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, width: Dimension, height: Dimension) -> bool {
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write_cmd_header(&dma.cmd, 0x0101);
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// Resource id, format (1: B8G8R8A8), width, height.
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dma.cmd.write(BODY, resource_id);
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dma.cmd.write(BODY + 4, 1u32);
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dma.cmd.write(BODY + 8, width.raw() as u32);
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dma.cmd.write(BODY + 12, height.raw() as u32);
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submit_cmd(mmio, queue, dma, 40)
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}
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pub fn attach_backing(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, fb_pa: PhysicalAddress, fb_size: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0106);
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// Resource id, one memory entry: its address and length.
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dma.cmd.write(BODY, resource_id);
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dma.cmd.write(BODY + 4, 1u32);
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dma.cmd.write(BODY + 8, fb_pa.raw() as u64);
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dma.cmd.write(BODY + 16, fb_size);
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submit_cmd(mmio, queue, dma, 48)
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}
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pub fn set_scanout(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, scanout_id: u32, resource_id: u32, width: Dimension, height: Dimension) -> bool {
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write_cmd_header(&dma.cmd, 0x0103);
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// The rectangle (from 0, 0), then scanout and resource ids.
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dma.cmd.write(RECT_W, width.raw() as u32);
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dma.cmd.write(RECT_H, height.raw() as u32);
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dma.cmd.write(BODY + 16, scanout_id);
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dma.cmd.write(BODY + 20, resource_id);
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submit_cmd(mmio, queue, dma, 48)
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}
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pub fn transfer_to_host(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, x: u32, y: u32, w: u32, h: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0105);
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put_rect(&dma.cmd, x, y, w, h);
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// Offset into the resource's memory, then the resource id.
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dma.cmd.write(BODY + 16, 0u64);
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dma.cmd.write(BODY + 24, resource_id);
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submit_cmd(mmio, queue, dma, 56)
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}
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pub fn resource_flush(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, x: u32, y: u32, w: u32, h: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0104);
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put_rect(&dma.cmd, x, y, w, h);
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dma.cmd.write(BODY + 16, resource_id);
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submit_cmd(mmio, queue, dma, 48)
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}
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fn write_cmd_header(cmd: &Window, cmd_type: u32) {
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cmd.fill_u32(ByteOffset::ZERO, 128, 0);
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cmd.write(TYPE, cmd_type);
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}
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fn put_rect(cmd: &Window, x: u32, y: u32, w: u32, h: u32) {
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cmd.write(RECT_X, x);
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cmd.write(RECT_Y, y);
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cmd.write(RECT_W, w);
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cmd.write(RECT_H, h);
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}
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pub fn get_display_info(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs) -> Option<(u32, u32)> {
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write_cmd_header(&dma.cmd, 0x0100);
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let descs = [
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Descriptor { addr: dma.cmd_pa.raw() as u64, len: 24, writable: false },
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Descriptor { addr: dma.resp_pa.raw() as u64, len: 408, writable: true },
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];
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if !queue.submit(mmio, &descs) { return None; }
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if dma.cmd.read::<u32>(RESPONSE) != 0x1101 { return None; }
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let w: u32 = dma.cmd.read(RESPONSE + DISPLAY_W.raw());
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let h: u32 = dma.cmd.read(RESPONSE + DISPLAY_H.raw());
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if w > 0 && h > 0 { Some((w, h)) } else { None }
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}
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fn submit_cmd(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, cmd_len: u32) -> bool {
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let descs = [
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Descriptor { addr: dma.cmd_pa.raw() as u64, len: cmd_len, writable: false },
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Descriptor { addr: dma.resp_pa.raw() as u64, len: 24, writable: true },
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];
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queue.submit(mmio, &descs)
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}
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