wire interstitial insertion into schedule engine resolve_block

This commit is contained in:
2026-07-12 14:05:33 +02:00
parent 8e4f724562
commit 8edd7a9c0b
3 changed files with 234 additions and 6 deletions

View File

@@ -426,6 +426,16 @@ impl ProgrammingBlock {
pub fn mid_roll_rule(&self) -> Option<&MidRollRule> {
self.mid_roll_rule.as_ref()
}
pub fn with_interstitial_rule(mut self, rule: InterstitialRule) -> Self {
self.interstitial_rule = Some(rule);
self
}
pub fn with_mid_roll_rule(mut self, rule: MidRollRule) -> Self {
self.mid_roll_rule = Some(rule);
self
}
}
#[derive(Debug, Clone, Serialize, Deserialize)]