refactor: ByteOffset newtype for window/register/ring offsets; named virtio-gpu cmd fields
This commit is contained in:
@@ -23,7 +23,7 @@ fn main() {
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libkos::println!("smptest: cannot map the counter page");
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syscall::exit();
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};
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let words = window.atomics(0, 1 + THREADS);
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let words = window.atomics(types::address::ByteOffset::ZERO, 1 + THREADS);
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for _ in 1..THREADS {
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if !libkos::thread::spawn(words, spin) {
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break;
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@@ -5,7 +5,7 @@ use hw_virtio::block::{self, DmaAddrs};
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use hw_virtio::mmio::{MmioAccess, Registers};
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use hw_virtio::queue::VirtioQueue;
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use port_block_device::{BlockDevice, SectorId};
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use types::address::{PhysicalAddress, VirtualAddress};
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use types::address::{ByteOffset, PhysicalAddress, VirtualAddress};
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use types::bounded::PageCount;
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const MMIO_VA: VirtualAddress = VirtualAddress::from_raw(0x20000);
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@@ -38,11 +38,11 @@ impl VirtioBlockDevice {
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let at = |offset: usize| PhysicalAddress::from_raw(req.physical.raw() + offset);
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let dma = DmaAddrs {
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header_pa: at(0),
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header: req.window.sub(0, 16),
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header: req.window.sub(ByteOffset::new(0), 16),
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status_pa: at(16),
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status: req.window.sub(16, 1),
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status: req.window.sub(ByteOffset::new(16), 1),
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data_pa: at(32),
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data: req.window.sub(32, SECTOR_SIZE),
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data: req.window.sub(ByteOffset::new(32), SECTOR_SIZE),
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};
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let capacity = regs.read(block::CONFIG_CAPACITY) as u64
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| (regs.read(block::CONFIG_CAPACITY + 4) as u64) << 32;
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@@ -6,7 +6,7 @@ use hw_virtio::mmio::{MmioAccess, Registers};
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use hw_virtio::queue::VirtioQueue;
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use libkos::Window;
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use port_framebuffer::Framebuffer;
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use types::address::{PhysicalAddress, VirtualAddress};
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use types::address::{ByteOffset, PhysicalAddress, VirtualAddress};
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use types::bounded::PageCount;
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use types::display::{Color, Dimension, ScreenCoord};
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@@ -50,7 +50,7 @@ impl VirtioFramebuffer {
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let dma = GpuDmaAddrs {
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cmd_pa: cmd.physical,
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cmd: cmd.window,
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resp_pa: PhysicalAddress::from_raw(cmd.physical.raw() + gpu::RESPONSE),
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resp_pa: PhysicalAddress::from_raw(cmd.physical.raw() + gpu::RESPONSE.raw()),
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};
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let (w, h) = gpu::get_display_info(®s, &queue, &dma)
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.and_then(|(w, h)| Some((u16::try_from(w).ok()?, u16::try_from(h).ok()?)))
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@@ -93,7 +93,7 @@ impl Framebuffer for VirtioFramebuffer {
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return;
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}
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let offset = (y.raw() as usize) * self.stride + (x.raw() as usize) * FB_BPP;
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self.pixels.write(offset, color.raw());
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self.pixels.write(ByteOffset::new(offset), color.raw());
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}
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fn fill_rect(&mut self, x: ScreenCoord, y: ScreenCoord, w: Dimension, h: Dimension, color: Color) {
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@@ -106,7 +106,7 @@ impl Framebuffer for VirtioFramebuffer {
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fn clear(&mut self, color: Color) {
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let total = self.width.raw() as usize * self.height.raw() as usize;
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self.pixels.fill_u32(0, total, color.raw());
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self.pixels.fill_u32(ByteOffset::ZERO, total, color.raw());
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}
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fn flush(&mut self) {
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@@ -3,11 +3,12 @@
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use libkos::Window;
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use port_input_device::{InputDevice, InputEvent, Key};
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use types::address::VirtualAddress;
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use types::address::{ByteOffset, VirtualAddress};
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const UART_VA: VirtualAddress = VirtualAddress::from_raw(0x20000);
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const UART_IER_OFFSET: usize = 1;
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const UART_LSR_OFFSET: usize = 5;
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const UART_RBR: ByteOffset = ByteOffset::new(0);
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const UART_IER_OFFSET: ByteOffset = ByteOffset::new(1);
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const UART_LSR_OFFSET: ByteOffset = ByteOffset::new(5);
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/// IER bit: interrupt when a received byte is waiting (cleared by reading
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/// it, so `acknowledge` has nothing to do).
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const IER_RX_READY: u8 = 1;
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@@ -27,7 +28,7 @@ impl UartInputDevice {
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}
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fn read_byte(&self) -> Option<u8> {
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self.has_event().then(|| self.regs.read(0))
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self.has_event().then(|| self.regs.read(UART_RBR))
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}
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fn byte_to_key(byte: u8) -> Key {
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@@ -7,7 +7,7 @@ use core::sync::atomic::{Ordering, fence};
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use hw_virtio::mmio::{MmioAccess, Registers};
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use libkos::Window;
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use port_input_device::{InputDevice, InputEvent};
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use types::address::{PhysicalAddress, VirtualAddress};
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use types::address::{ByteOffset, PhysicalAddress, VirtualAddress};
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use types::bounded::PageCount;
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const INPUT_MMIO_VA: VirtualAddress = VirtualAddress::from_raw(0x25000);
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@@ -18,8 +18,8 @@ const QUEUE_SIZE: usize = 32;
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const EVENT_SIZE: usize = 8;
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const DESC_SIZE: usize = 16;
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/// Where the legacy layout puts the available and used rings.
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const AVAIL: usize = QUEUE_SIZE * DESC_SIZE;
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const USED: usize = 4096;
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const AVAIL: ByteOffset = ByteOffset::new(QUEUE_SIZE * DESC_SIZE);
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const USED: ByteOffset = ByteOffset::new(4096);
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const EV_KEY: u16 = 1;
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const KEY_PRESS: u32 = 1;
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@@ -67,7 +67,7 @@ impl VirtioInputDevice {
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/// Every buffer goes to the device, one event each.
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fn fill_queue(&mut self) {
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for i in 0..QUEUE_SIZE {
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let desc = i * DESC_SIZE;
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let desc = ByteOffset::new(i * DESC_SIZE);
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self.rings.write(desc, (self.events_pa.raw() + i * EVENT_SIZE) as u64);
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self.rings.write(desc + 8, EVENT_SIZE as u32);
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self.rings.write(desc + 12, 2u16); // WRITE flag
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@@ -92,7 +92,7 @@ impl VirtioInputDevice {
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}
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fn read_event(&self, desc_idx: u16) -> (u16, u16, u32) {
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let at = desc_idx as usize % QUEUE_SIZE * EVENT_SIZE;
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let at = ByteOffset::new(desc_idx as usize % QUEUE_SIZE * EVENT_SIZE);
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(self.events.read(at), self.events.read(at + 2), self.events.read(at + 4))
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}
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@@ -1,7 +1,7 @@
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use crate::mmio::MmioAccess;
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use crate::queue::{Descriptor, VirtioQueue};
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use libkos::Window;
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use types::address::PhysicalAddress;
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use types::address::{ByteOffset, PhysicalAddress};
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const SECTOR_SIZE: usize = 512;
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@@ -16,11 +16,15 @@ pub struct DmaAddrs {
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pub data: Window,
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}
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const HEADER_TYPE: ByteOffset = ByteOffset::new(0);
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const HEADER_RESERVED: ByteOffset = ByteOffset::new(4);
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const HEADER_SECTOR: ByteOffset = ByteOffset::new(8);
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fn put_header(dma: &DmaAddrs, req_type: u32, sector: u32) {
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dma.header.write(0, req_type);
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dma.header.write(4, 0u32);
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dma.header.write(8, sector as u64);
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dma.status.write(0, 0xFFu8);
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dma.header.write(HEADER_TYPE, req_type);
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dma.header.write(HEADER_RESERVED, 0u32);
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dma.header.write(HEADER_SECTOR, sector as u64);
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dma.status.write(ByteOffset::ZERO, 0xFFu8);
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}
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pub fn read_sector(
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@@ -42,15 +46,15 @@ pub fn read_sector(
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if !queue.submit(mmio, &descs) { return false; }
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if dma.status.read::<u8>(0) != 0 { return false; }
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dma.data.copy_to(0, &mut buf[..SECTOR_SIZE]);
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if dma.status.read::<u8>(ByteOffset::ZERO) != 0 { return false; }
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dma.data.copy_to(ByteOffset::ZERO, &mut buf[..SECTOR_SIZE]);
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true
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}
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/// Request types (virtio spec 5.2.6).
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const T_OUT: u32 = 1;
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/// Device configuration: the disk's size in 512-byte sectors (le64).
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pub const CONFIG_CAPACITY: usize = 0x100;
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pub const CONFIG_CAPACITY: ByteOffset = ByteOffset::new(0x100);
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/// Writes one sector from `buf`; true once the device reports success.
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pub fn write_sector(
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@@ -62,7 +66,7 @@ pub fn write_sector(
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) -> bool {
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if buf.len() < SECTOR_SIZE { return false; }
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dma.data.copy_from(0, &buf[..SECTOR_SIZE]);
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dma.data.copy_from(ByteOffset::ZERO, &buf[..SECTOR_SIZE]);
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put_header(dma, T_OUT, sector);
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// The device reads the data this time; only the status is written back.
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@@ -72,5 +76,5 @@ pub fn write_sector(
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Descriptor { addr: dma.status_pa.raw() as u64, len: 1, writable: true },
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];
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if !queue.submit(mmio, &descs) { return false; }
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dma.status.read::<u8>(0) == 0
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dma.status.read::<u8>(ByteOffset::ZERO) == 0
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}
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@@ -1,7 +1,7 @@
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use crate::mmio::MmioAccess;
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use crate::queue::{Descriptor, VirtioQueue};
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use libkos::Window;
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use types::address::PhysicalAddress;
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use types::address::{ByteOffset, PhysicalAddress};
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use types::display::Dimension;
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/// The command page: commands go out from its start, responses come back
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@@ -12,59 +12,76 @@ pub struct GpuDmaAddrs {
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pub resp_pa: PhysicalAddress,
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}
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pub const RESPONSE: usize = 512;
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pub const RESPONSE: ByteOffset = ByteOffset::new(512);
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/// Command fields (virtio spec 5.7.6.7): a 24-byte header, then the body.
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const TYPE: ByteOffset = ByteOffset::new(0);
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const BODY: ByteOffset = ByteOffset::new(24);
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/// Most bodies start with a rectangle: x, y, width, height.
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const RECT_X: ByteOffset = ByteOffset::new(24);
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const RECT_Y: ByteOffset = ByteOffset::new(28);
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const RECT_W: ByteOffset = ByteOffset::new(32);
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const RECT_H: ByteOffset = ByteOffset::new(36);
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/// The 24 bytes of header and 16 of rectangle in a display-info response.
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const DISPLAY_W: ByteOffset = ByteOffset::new(24 + 8);
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const DISPLAY_H: ByteOffset = ByteOffset::new(24 + 12);
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pub fn create_2d(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, width: Dimension, height: Dimension) -> bool {
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write_cmd_header(&dma.cmd, 0x0101);
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dma.cmd.write(24, resource_id);
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dma.cmd.write(28, 1u32);
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dma.cmd.write(32, width.raw() as u32);
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dma.cmd.write(36, height.raw() as u32);
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// Resource id, format (1: B8G8R8A8), width, height.
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dma.cmd.write(BODY, resource_id);
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dma.cmd.write(BODY + 4, 1u32);
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dma.cmd.write(BODY + 8, width.raw() as u32);
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dma.cmd.write(BODY + 12, height.raw() as u32);
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submit_cmd(mmio, queue, dma, 40)
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}
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pub fn attach_backing(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, fb_pa: PhysicalAddress, fb_size: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0106);
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dma.cmd.write(24, resource_id);
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dma.cmd.write(28, 1u32);
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dma.cmd.write(32, fb_pa.raw() as u64 as u64);
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dma.cmd.write(40, fb_size);
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// Resource id, one memory entry: its address and length.
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dma.cmd.write(BODY, resource_id);
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dma.cmd.write(BODY + 4, 1u32);
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dma.cmd.write(BODY + 8, fb_pa.raw() as u64);
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dma.cmd.write(BODY + 16, fb_size);
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submit_cmd(mmio, queue, dma, 48)
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}
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pub fn set_scanout(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, scanout_id: u32, resource_id: u32, width: Dimension, height: Dimension) -> bool {
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write_cmd_header(&dma.cmd, 0x0103);
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dma.cmd.write(32, width.raw() as u32);
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dma.cmd.write(36, height.raw() as u32);
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dma.cmd.write(40, scanout_id);
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dma.cmd.write(44, resource_id);
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// The rectangle (from 0, 0), then scanout and resource ids.
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dma.cmd.write(RECT_W, width.raw() as u32);
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dma.cmd.write(RECT_H, height.raw() as u32);
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dma.cmd.write(BODY + 16, scanout_id);
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dma.cmd.write(BODY + 20, resource_id);
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submit_cmd(mmio, queue, dma, 48)
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}
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pub fn transfer_to_host(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, x: u32, y: u32, w: u32, h: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0105);
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dma.cmd.write(24, x);
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dma.cmd.write(28, y);
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dma.cmd.write(32, w);
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dma.cmd.write(36, h);
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dma.cmd.write(40, 0u64);
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dma.cmd.write(48, resource_id);
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put_rect(&dma.cmd, x, y, w, h);
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// Offset into the resource's memory, then the resource id.
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dma.cmd.write(BODY + 16, 0u64);
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dma.cmd.write(BODY + 24, resource_id);
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submit_cmd(mmio, queue, dma, 56)
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}
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pub fn resource_flush(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs, resource_id: u32, x: u32, y: u32, w: u32, h: u32) -> bool {
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write_cmd_header(&dma.cmd, 0x0104);
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dma.cmd.write(24, x);
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dma.cmd.write(28, y);
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dma.cmd.write(32, w);
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dma.cmd.write(36, h);
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dma.cmd.write(40, resource_id);
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put_rect(&dma.cmd, x, y, w, h);
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dma.cmd.write(BODY + 16, resource_id);
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submit_cmd(mmio, queue, dma, 48)
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}
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fn write_cmd_header(cmd: &Window, cmd_type: u32) {
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cmd.fill_u32(0, 128, 0);
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cmd.write(0, cmd_type);
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cmd.fill_u32(ByteOffset::ZERO, 128, 0);
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cmd.write(TYPE, cmd_type);
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}
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fn put_rect(cmd: &Window, x: u32, y: u32, w: u32, h: u32) {
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cmd.write(RECT_X, x);
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cmd.write(RECT_Y, y);
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cmd.write(RECT_W, w);
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cmd.write(RECT_H, h);
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}
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pub fn get_display_info(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDmaAddrs) -> Option<(u32, u32)> {
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@@ -75,8 +92,8 @@ pub fn get_display_info(mmio: &impl MmioAccess, queue: &VirtioQueue, dma: &GpuDm
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];
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if !queue.submit(mmio, &descs) { return None; }
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if dma.cmd.read::<u32>(RESPONSE) != 0x1101 { return None; }
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let w: u32 = dma.cmd.read(RESPONSE + 24 + 8);
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let h: u32 = dma.cmd.read(RESPONSE + 24 + 12);
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let w: u32 = dma.cmd.read(RESPONSE + DISPLAY_W.raw());
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let h: u32 = dma.cmd.read(RESPONSE + DISPLAY_H.raw());
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if w > 0 && h > 0 { Some((w, h)) } else { None }
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}
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@@ -1,26 +1,28 @@
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use types::address::ByteOffset;
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pub trait MmioAccess {
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fn read(&self, offset: usize) -> u32;
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fn write(&self, offset: usize, val: u32);
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fn read(&self, offset: ByteOffset) -> u32;
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fn write(&self, offset: ByteOffset, val: u32);
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}
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pub const MAGIC: u32 = 0x74726976;
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pub const REG_MAGIC: usize = 0x000;
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pub const REG_VERSION: usize = 0x004;
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pub const REG_DEVICE_ID: usize = 0x008;
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pub const REG_STATUS: usize = 0x070;
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pub const REG_GUEST_PAGE_SIZE: usize = 0x028;
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pub const REG_FEATURES_SEL: usize = 0x014;
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pub const REG_FEATURES: usize = 0x010;
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pub const REG_DRIVER_FEATURES_SEL: usize = 0x024;
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pub const REG_DRIVER_FEATURES: usize = 0x020;
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pub const REG_QUEUE_SEL: usize = 0x030;
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pub const REG_QUEUE_NUM_MAX: usize = 0x034;
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pub const REG_QUEUE_NUM: usize = 0x038;
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pub const REG_QUEUE_PFN: usize = 0x040;
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pub const REG_QUEUE_NOTIFY: usize = 0x050;
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pub const REG_INTERRUPT_STATUS: usize = 0x060;
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pub const REG_INTERRUPT_ACK: usize = 0x064;
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pub const REG_MAGIC: ByteOffset = ByteOffset::new(0x000);
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pub const REG_VERSION: ByteOffset = ByteOffset::new(0x004);
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pub const REG_DEVICE_ID: ByteOffset = ByteOffset::new(0x008);
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pub const REG_STATUS: ByteOffset = ByteOffset::new(0x070);
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pub const REG_GUEST_PAGE_SIZE: ByteOffset = ByteOffset::new(0x028);
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pub const REG_FEATURES_SEL: ByteOffset = ByteOffset::new(0x014);
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pub const REG_FEATURES: ByteOffset = ByteOffset::new(0x010);
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pub const REG_DRIVER_FEATURES_SEL: ByteOffset = ByteOffset::new(0x024);
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pub const REG_DRIVER_FEATURES: ByteOffset = ByteOffset::new(0x020);
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pub const REG_QUEUE_SEL: ByteOffset = ByteOffset::new(0x030);
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pub const REG_QUEUE_NUM_MAX: ByteOffset = ByteOffset::new(0x034);
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pub const REG_QUEUE_NUM: ByteOffset = ByteOffset::new(0x038);
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pub const REG_QUEUE_PFN: ByteOffset = ByteOffset::new(0x040);
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pub const REG_QUEUE_NOTIFY: ByteOffset = ByteOffset::new(0x050);
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pub const REG_INTERRUPT_STATUS: ByteOffset = ByteOffset::new(0x060);
|
||||
pub const REG_INTERRUPT_ACK: ByteOffset = ByteOffset::new(0x064);
|
||||
|
||||
pub const STATUS_ACK: u32 = 1;
|
||||
pub const STATUS_DRIVER: u32 = 2;
|
||||
@@ -42,11 +44,11 @@ impl Registers {
|
||||
}
|
||||
|
||||
impl MmioAccess for Registers {
|
||||
fn read(&self, offset: usize) -> u32 {
|
||||
fn read(&self, offset: ByteOffset) -> u32 {
|
||||
self.0.read(offset)
|
||||
}
|
||||
|
||||
fn write(&self, offset: usize, val: u32) {
|
||||
fn write(&self, offset: ByteOffset, val: u32) {
|
||||
self.0.write(offset, val)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,13 +1,14 @@
|
||||
use crate::mmio::{MmioAccess, REG_QUEUE_NOTIFY};
|
||||
use core::sync::atomic::{Ordering, fence};
|
||||
use libkos::Window;
|
||||
use types::address::ByteOffset;
|
||||
|
||||
pub const QUEUE_SIZE: usize = 8;
|
||||
const DESC_SIZE: usize = 16;
|
||||
const TIMEOUT: u32 = 10_000_000;
|
||||
/// Where the legacy layout puts the available and used rings.
|
||||
const AVAIL: usize = QUEUE_SIZE * DESC_SIZE;
|
||||
const USED: usize = 4096;
|
||||
const AVAIL: ByteOffset = ByteOffset::new(QUEUE_SIZE * DESC_SIZE);
|
||||
const USED: ByteOffset = ByteOffset::new(4096);
|
||||
|
||||
pub struct Descriptor {
|
||||
pub addr: u64,
|
||||
@@ -32,7 +33,7 @@ impl VirtioQueue {
|
||||
}
|
||||
let r = &self.rings;
|
||||
for (i, d) in descs.iter().enumerate() {
|
||||
let at = i * DESC_SIZE;
|
||||
let at = ByteOffset::new(i * DESC_SIZE);
|
||||
let last = i == descs.len() - 1;
|
||||
let flags: u16 = if d.writable { 2 } else { 0 } | if !last { 1 } else { 0 };
|
||||
r.write(at, d.addr);
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
|
||||
use libkos::fs::Storage;
|
||||
use libkos::syscall;
|
||||
use types::address::{EntryPoint, VirtualAddress};
|
||||
use types::address::{ByteOffset, EntryPoint, VirtualAddress};
|
||||
use types::bounded::{CapSlot, PageCount};
|
||||
use types::budget::Limits;
|
||||
|
||||
@@ -53,7 +53,7 @@ pub(crate) fn load_binary(
|
||||
|
||||
let page_count = PageCount::new(u16::try_from(seg_pages).ok()?)?;
|
||||
let local = libkos::window::request(page_count)?;
|
||||
local.fill_u32(0, seg_pages * PAGE_SIZE / 4, 0);
|
||||
local.fill_u32(ByteOffset::ZERO, seg_pages * PAGE_SIZE / 4, 0);
|
||||
|
||||
let copy_len = segment.file_size.min(segment.mem_size);
|
||||
let src = segment
|
||||
@@ -61,7 +61,7 @@ pub(crate) fn load_binary(
|
||||
.checked_add(copy_len)
|
||||
.and_then(|end| elf_data.get(segment.file_offset..end));
|
||||
if let Some(src) = src.filter(|_| copy_len > 0) {
|
||||
local.copy_from(offset_in_page, src);
|
||||
local.copy_from(ByteOffset::new(offset_in_page), src);
|
||||
}
|
||||
|
||||
for p in 0..seg_pages {
|
||||
|
||||
@@ -68,7 +68,7 @@ fn check_stopped(words: Words, what: &'static str) -> Result<(), &'static str> {
|
||||
fn run_phases(storage: &mut Storage, scratch: &mut [u8]) -> Result<(), &'static str> {
|
||||
let page = syscall::create_region(PageCount::new(1).ok_or("page count")?).map_err(|_| "no counter page")?;
|
||||
let window = libkos::window::map(page, OBSERVE_VA, PagePerms::ReadWrite).map_err(|_| "cannot map the counter page")?;
|
||||
let words = window.atomics(0, 1 + THREADS);
|
||||
let words = window.atomics(types::address::ByteOffset::ZERO, 1 + THREADS);
|
||||
|
||||
let events = syscall::create_notification().map_err(|_| "no notification")?;
|
||||
timer_is_on_time(events)?;
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
//! Every access is volatile and bounds-checked; out of range panics.
|
||||
|
||||
use core::sync::atomic::AtomicUsize;
|
||||
use types::address::VirtualAddress;
|
||||
use types::address::{ByteOffset, VirtualAddress};
|
||||
use types::bounded::{CapSlot, PageCount};
|
||||
use types::mapping::PagePerms;
|
||||
|
||||
@@ -76,7 +76,8 @@ impl Window {
|
||||
}
|
||||
|
||||
/// The address of `size` bytes at `offset`, aligned for them.
|
||||
fn at(&self, offset: usize, size: usize, align: usize) -> usize {
|
||||
fn at(&self, offset: ByteOffset, size: usize, align: usize) -> usize {
|
||||
let offset = offset.raw();
|
||||
let end = offset.checked_add(size);
|
||||
assert!(end.is_some_and(|e| e <= self.len), "window access out of range");
|
||||
let addr = self.base.raw() + offset;
|
||||
@@ -84,33 +85,33 @@ impl Window {
|
||||
addr
|
||||
}
|
||||
|
||||
pub fn read<T: Scalar>(&self, offset: usize) -> T {
|
||||
pub fn read<T: Scalar>(&self, offset: ByteOffset) -> T {
|
||||
let addr = self.at(offset, size_of::<T>(), align_of::<T>());
|
||||
// SAFETY: in range of memory mapped for this process, aligned for
|
||||
// T; T is a plain integer, valid for any bits.
|
||||
unsafe { core::ptr::read_volatile(addr as *const T) }
|
||||
}
|
||||
|
||||
pub fn write<T: Scalar>(&self, offset: usize, value: T) {
|
||||
pub fn write<T: Scalar>(&self, offset: ByteOffset, value: T) {
|
||||
let addr = self.at(offset, size_of::<T>(), align_of::<T>());
|
||||
// SAFETY: as in `read`; the window hands out no references to it.
|
||||
unsafe { core::ptr::write_volatile(addr as *mut T, value) }
|
||||
}
|
||||
|
||||
/// The `len` bytes at `offset`, as a window of their own.
|
||||
pub fn sub(&self, offset: usize, len: usize) -> Window {
|
||||
pub fn sub(&self, offset: ByteOffset, len: usize) -> Window {
|
||||
let base = VirtualAddress::from_raw(self.at(offset, len, 1));
|
||||
Window { base, len }
|
||||
}
|
||||
|
||||
pub fn copy_from(&self, offset: usize, src: &[u8]) {
|
||||
pub fn copy_from(&self, offset: ByteOffset, src: &[u8]) {
|
||||
self.at(offset, src.len(), 1);
|
||||
for (i, b) in src.iter().enumerate() {
|
||||
self.write(offset + i, *b);
|
||||
}
|
||||
}
|
||||
|
||||
pub fn copy_to(&self, offset: usize, dst: &mut [u8]) {
|
||||
pub fn copy_to(&self, offset: ByteOffset, dst: &mut [u8]) {
|
||||
self.at(offset, dst.len(), 1);
|
||||
for (i, b) in dst.iter_mut().enumerate() {
|
||||
*b = self.read(offset + i);
|
||||
@@ -118,7 +119,7 @@ impl Window {
|
||||
}
|
||||
|
||||
/// `count` u32s from `offset` set to `value`.
|
||||
pub fn fill_u32(&self, offset: usize, count: usize, value: u32) {
|
||||
pub fn fill_u32(&self, offset: ByteOffset, count: usize, value: u32) {
|
||||
let bytes = count.checked_mul(4).expect("window fill too large");
|
||||
self.at(offset, bytes, 4);
|
||||
for i in 0..count {
|
||||
@@ -128,7 +129,7 @@ impl Window {
|
||||
|
||||
/// `count` words from `offset` as atomics, for memory shared with
|
||||
/// threads or processes that only ever touch it atomically.
|
||||
pub fn atomics(&self, offset: usize, count: usize) -> &'static [AtomicUsize] {
|
||||
pub fn atomics(&self, offset: ByteOffset, count: usize) -> &'static [AtomicUsize] {
|
||||
let bytes = count.checked_mul(size_of::<AtomicUsize>()).expect("too many atomics");
|
||||
let addr = self.at(offset, bytes, align_of::<AtomicUsize>());
|
||||
// SAFETY: mapped and aligned; AtomicUsize may be shared and is
|
||||
|
||||
@@ -68,3 +68,29 @@ impl DataRef {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// A position in bytes inside a mapped window: a device register, a field
|
||||
/// of a ring or command. Adding a byte count moves it along.
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
|
||||
pub struct ByteOffset(usize);
|
||||
|
||||
impl ByteOffset {
|
||||
pub const ZERO: Self = Self(0);
|
||||
|
||||
pub const fn new(bytes: usize) -> Self {
|
||||
Self(bytes)
|
||||
}
|
||||
|
||||
pub const fn raw(&self) -> usize {
|
||||
self.0
|
||||
}
|
||||
}
|
||||
|
||||
impl core::ops::Add<usize> for ByteOffset {
|
||||
type Output = Self;
|
||||
|
||||
/// Saturates: an offset past the end is refused where it is used.
|
||||
fn add(self, bytes: usize) -> Self {
|
||||
Self(self.0.saturating_add(bytes))
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user