GKaszewski/k-os
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refactor(adapter-riscv): restructure into hw/, mmu/, trap/ modules with board constants

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Add Priority::DEFAULT and TimeSlice::DEFAULT to types crate.
All QEMU virt addresses consolidated in board.rs.
Structure mirrors future adapter-arm/ layout.
This commit is contained in:
Gabriel Kaszewski
2026-10-18 02:05:57 +02:00
parent 66a730b2fe
commit d327794d33
13 changed files with 100 additions and 109 deletions
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46
crates/adapter-riscv/src/main.rs
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@@ -1,15 +1,14 @@
#![no_std]
#![no_main]
mod page_table;
mod board;
mod hw;
mod mmu;
mod platform;
mod plic;
mod timer;
mod trap;
mod uart;
use core::arch::global_asm;
use uart::Uart;
use hw::uart::Uart;
global_asm!(
r#"
@@ -47,27 +46,24 @@ extern "C" fn kmain() -> ! {
uart.write_str("k-os: booted on RISC-V\n");
let heap_start = unsafe { &_heap_start as *const u8 as usize };
page_table::init_page_allocator(heap_start);
let kernel_pt = page_table::init_kernel_page_table();
page_table::activate(kernel_pt);
mmu::init_allocator(heap_start);
let kernel_pt = mmu::init_kernel_page_table();
mmu::activate(kernel_pt);
uart.write_str("k-os: MMU enabled (Sv39)\n");
trap::init_trap();
timer::init_timer();
plic::Plic::init();
trap::init();
hw::timer::init();
hw::plic::Plic::init();
uart.write_str("k-os: traps and timer initialized\n");
let riscv_platform = platform::RiscVPlatform::new();
let pool = domain::memory::page_pool::PagePool::new(
types::address::PhysicalAddress::from_raw(0x84000000),
256,
types::address::PhysicalAddress::from_raw(board::USER_POOL_BASE),
board::USER_POOL_PAGES,
);
let mut kern = kernel::Kernel::new(riscv_platform, pool);
let (pid, tid) = kern
.boot(
types::bounded::Priority::new(16).unwrap_or_else(|| unreachable!()),
types::time::TimeSlice::new(100),
)
.boot(types::bounded::Priority::DEFAULT, types::time::TimeSlice::DEFAULT)
.unwrap_or_else(|_| loop { unsafe { core::arch::asm!("wfi") }; });
uart.write_str("k-os: kernel started (pid=");
@@ -100,8 +96,7 @@ fn ipc_demo(
uart.write_str("k-os: --- IPC demo ---\n");
// Create process B using init's ProcessCreate cap (slot 0)
let proc_b_slot = match kern.handle_syscall(Syscall::CreateProcess {
let _proc_b_slot = match kern.handle_syscall(Syscall::CreateProcess {
create_cap: CapSlot::new(0).unwrap_or_else(|| unreachable!()),
image: DataRef::empty(),
}) {
@@ -115,10 +110,8 @@ fn ipc_demo(
let tid_b = ThreadId::from_raw(1);
uart.write_str("k-os: process B created\n");
// Create an endpoint
let ep_id = kern.create_endpoint().unwrap_or_else(|_| unreachable!());
// Grant endpoint caps to both processes
let ep_cap_a = kern.grant_capability(
init_pid,
Resource::Endpoint(ep_id),
@@ -137,10 +130,8 @@ fn ipc_demo(
uart.write_str("k-os: endpoint created, caps granted\n");
// Process B calls Receive (blocks — no sender yet)
kern.switch_to_thread(tid_b);
let outcome = kern.handle_syscall(Syscall::Receive { endpoint: ep_cap_b });
match &outcome {
match kern.handle_syscall(Syscall::Receive { endpoint: ep_cap_b }) {
SyscallOutcome::BlockCaller(_) => {
uart.write_str("k-os: process B blocked on Receive\n");
}
@@ -150,15 +141,13 @@ fn ipc_demo(
}
}
// Process A calls Send (finds B waiting → delivers message)
let tid_a = ThreadId::from_raw(0);
kern.switch_to_thread(tid_a);
let msg = Message::from_words([42, 7, 0, 0]);
let outcome = kern.handle_syscall(Syscall::Send {
match kern.handle_syscall(Syscall::Send {
endpoint: ep_cap_a,
message: msg,
});
match &outcome {
}) {
SyscallOutcome::SwitchTo(target) => {
uart.write_str("k-os: Send delivered, switching to thread ");
uart.write_dec(target.raw() as usize);
@@ -170,7 +159,6 @@ fn ipc_demo(
}
}
// Check B's pending result
match kern.pending_result(tid_b) {
Some(SyscallResult::Message(m)) => {
uart.write_str("k-os: IPC complete — received: [");